1. Field of the Invention
This invention relates to a method of forming a refractory metal plug for filling a fine connecting hole with a refractory metal layer during a production process for a semiconductor device.
2. Description of the Related Art
In VLSIs, as the circuit pattern becomes finer and the degree of integration is becoming higher, the opening diameter of connecting holes, such as contact holes or via-holes, formed in the interlayer insulating film, is becoming finer, while, in keeping pace therewith, the aspect ratio of the connecting hole is also increased. Among the most commonly employed interconnection materials for the semiconductor devices is an aluminum-based material, which is usually deposited by sputtering on a wafer. Bias sputtering also has recently been in use, by which a bias voltage is applied to the wafer during sputtering to achieve planarizing effects. However, if it is attempted to deposit an Al-based layer by bias sputtering when forming an interconnection between an upper metallization and a lower metallization by means of a connecting hole having a high aspect ratio, voids are produced within the connecting holes due to insufficient step coverage and these voids will lower the reliability of the metallization. For this reason, investigations in burying a layer of an electrically conductive material within a connecting hole for forming a plug are proceeding briskly.
However, the resistance can not be lowered satisfactorily if polysilicon etc. is used as an electrically conductive material. Thus the formation of a low resistance plug by refractory metal is attracting attention. The refractory metal now in popular use is tungsten (W).
A tungsten (W) plug may be formed by a blanket CVD method (Blk-CVD method) or a selective CVD method. In the Blk-CVD method, a uniform W layer is deposited within the connecting hole and on an interlayer insulating film, whereas, in the selective CVD method, a W layer is selectively grown in the connecting hole.
However, the following problems arise in these methods of forming the W plugs.
First, in the selective CVD method, the problem of failure in selectivity tends to be raised during the process. It is also difficult as a principle to uniformly fill connecting holes of different depths, such that excess growths known as nailheads are produced in narrow connecting holes where burial is completed prematurely. A process of coating the wafer once with a planarizing material, such as a resist, and subsequently etching back the wafer is required for removing the nailhead.
In the selective CVD method, because of rough surface morphology of the deposited W layer, microirregularities are produced on the surface to lower intimate bonding properties to the upper metallization to be formed during the subsequent process and to deteriorate reliability in the metallization.
On the other hand, in the Blk-CVD method, since the W layer is also deposited on the interlayer insulating film, an etching back operation becomes necessary to leave an W layer only within the connecting hole for forming a plug. Besides, with the Blk-CVD method, since columnar crystals of W are grown to a larger grain size, the W layer presents a rough surface morphology, as in the selective CVD method, such that residues tend to be produced during the etchback operation or the surface morphology tends to be transferred to the surface of the underlying barrier metal layer or the interlayer insulating film. The electrical resistance of the metallization may be increased due to these residues, or the intimate bonding to the upper metallization formed during the next step may be lowered because the surface morphology tends to be transferred to the underlying layer.